Figure 1 BUC power supply
Typically, when designing an asynchronous buck power supply, a bootstrap capacitor is connected between the chip's SW and BOOT pins, such as C1 in Figure 1. The bootstrap capacitor utilizes the characteristic that the voltage across the capacitor cannot change suddenly. When a certain voltage is maintained across the capacitor, when the voltage at the negative terminal of the capacitor is increased, the voltage at the positive terminal remains at the original voltage difference at the negative terminal, thereby increasing the driving voltage.
Figure 2 Buck chip internal structure diagram
The buck chip shown in Figure 2 consists of two NMOS transistors, which alternately conduct in a complementary manner. The total input voltage VIN is fed through an internal voltage regulator, which outputs a DC low voltage Vb for charging Vboot. This internal voltage regulator is typically a low-dropout (LDO) power supply. During buck chip operation, when the low-side MOSFET Q2 is on, the SW voltage is 0. The LDO output voltage Vb charges the bootstrap capacitor C1, which then flows through the diode D1 and then the low-side MOSFET Q2. The voltage across the capacitor is approximately equal to Vb, and the BOOT pin voltage is now Vb. When the low-side MOSFET Q2 is off and the high-side MOSFET Q1 is on, the voltage at the SW pin rises from 0V to VIN. The S-pole of low-side MOSFET Q2 is directly grounded. As long as the G-pole outputs a high level (>Vth), low-side MOSFET Q2 will turn on. The S-pole voltage of high-side MOSFET Q1 is the input voltage VIN. To maintain the on-state of high-side MOSFET Q1, its gate drive voltage must be greater than VIN + Vgs(th). Since the voltage across the capacitor cannot change suddenly at this point, the BOOT pin is raised to a voltage greater than VIN (VIN + Vb). Capacitor C1 is connected in parallel to the power supply of the high-side MOSFET Q1's driver unit, HS Driver. The bootstrap capacitor C1 discharges to provide power to it, and the supply voltage is the voltage difference across the bootstrap capacitor. Due to the presence of the bootstrap capacitor, the gate-source drive voltage of high-side MOSFET Q1 meets the turn-on condition (Vgs > VIN + Vgs(th)), thus maintaining the on-state of high-side MOSFET Q1. As long as the voltage from the BOOT pin to the SW pin is above the BOOT UVLO threshold, high-side MOSFET Q1 remains on. When the voltage of the bootstrap capacitor drops below the BOOT UVLO threshold due to discharge, the high-side MOSFET Q1 is turned off and the low-side MOSFET Q2 is turned on, periodically charging the bootstrap capacitor, thereby implementing the PWM control mode of the buck power supply.
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